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CSIS Staff: Robert H. Klenke

Position: Principal Scientist
Department: Electrical Engineering
Office: Thornton Hall Room E212
Phone: 804-924-6079Fax: 804-924-8818
Email: klenke@virginia.edu

Other Home Pages: EE Dept. Home Page for Robert H. Klenke

Biography

Dr. Klenke received his BSEE from the Virginia Military Institute in 1982. He served four years in the United States Navy as a Civil Engineer Corps officer. During his Navy career he was promoted to the rank of Lieutenant and received the Navy Achievement Medal and the Meritorious Unit Citation.

Dr. Klenke entered the graduate program in electrical engineering at UVa in January 1989. He received his MSEE in 1989 in the area of VHDL Design Automation Tools, and his Ph.D. in electrical engineering in January of 1992 in the area of Parallel Algorithms for Automatic Test Pattern Generation.

Dr. Klenke is currently a Principal Scientist in the Center for Semicuston Integrated Systems.

Current Research

His research interests include, VLSI systems design, system-level performance and hybrid modeling, and parallel ATPG algorithms.

Publications

McGraw, Robert, James H. Aylor, Robert H. Klenke, "A Top-down Design Environment for Developing Pipelined Datapaths", To Appear in the Proceedings of the Design Automation Conference 1998.

Klenke, Robert H., Andrew P. Voss, James H. Aylor, "Performance Modeling of Multicomputer Systems in VHDL using ADEPT", Proceedings of the IASTED International Conference on Modeling and Simulation, 1997, pp 429-438.

Dungan, William W., Robert H. Klenke, James H. Aylor, "Mixed-Level Modeling in VHDL Using the Watch-and-React Interface", Proceedings of the Fall VHDL International Users Forum, 1997, pp25-32.

Voss, Andrew P., Robert H. Klenke, James H. Aylor, "The Analysis of Modeling Styles for System Level VHDL Simulations", Proceedings of the Fall VHDL International Users Forum, 1995, pp1.7-1.13.

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